Publications

Here is a list of publications I contributed to.

2016

Lovic Gauthier

High Speed Cycle-Accurate Processor Simulation Through Ahead of Time Compilation Inproceedings

Proceedings of the 20th Workshop on Synthesis and System Integration of Mixed Information Technologies (SASIMI'16), pp. 195–200, 2016.

BibTeX | Tags: ahead of time compilation, aot, cycle-accurate, processor, processor simulator, simulator

2014

Hideki Takase, Zeng Gang, Lovic Gauthier, Hirotaka Kawashima, Noritoshi Atsumi, Tomohiro Tatematsu, Yoshitake Kobayashi, Takenori Koshiro, Tohru Ishihara, Hiroyuki Tomiyama, others

An Integrated Framework for Energy Optimization of Embedded Real-Time Applications Journal Article

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 97 (12), pp. 2477–2487, 2014.

BibTeX | Tags: compilation, embedded system, enery characterization, integer linear programming, low energy consumption, multitask, operating system, scratch-pad memory

2013

Lovic Gauthier, Shinya Ueno, Koji Inoue

Hybrid compile and run-time memory management for a 3D-stacked reconfigurable accelerator Inproceedings

Proceedings of the 2013 International Conference on Compilers, Architectures and Synthesis for Embedded Systems, pp. 10, IEEE Press 2013.

BibTeX | Tags: 3D chip, compilation, many-core, memory management, reconfigurable processor

2012

Farhad Mehdipour, Krishna Chaitanya Nunna, Lovic Gauthier, Koji Inoue, Kazuaki Murakami

A thermal-aware mapping algorithm for reducing peak temperature of an accelerator deployed in a 3D stack Inproceedings

3D Systems Integration Conference (3DIC), 2011 IEEE International, pp. 1–4, IEEE 2012.

BibTeX | Tags: 3D chip, mapping, thermal

Lovic Gauthier, Farhad Mehdipour, Koji Inoue, Shinya Ueno, Hiroshi Sasaki

Efficient barrier synchronization for 2D meshed NoC-based many-core processors Inproceedings

17th Workshop on Synthesis and System Integration of Mixed Information Technologies (SASIMI'12), Citeseer 2012.

BibTeX | Tags: barrier, many-core, NoC

Lovic Gauthier, Tohru Ishihara

Processor energy characterization for compiler-assisted software energy reduction Journal Article

Journal of Electrical and Computer Engineering, 2012 , pp. 8, 2012.

BibTeX | Tags: compilation, enery characterization, integer linear programming, low energy consumption, memory management, scratch-pad memory

2011

Hideki Takase, Gang Zeng, Hirotaka Kawashima, Noritoshi Atsumi, Tomohiro Tatematsu, Lovic Gauthier, Tohru Ishihara, Yoshitake Kobayashi, Shunitsu Kohara, Takenori Koshiro, others

An Energy Optimization Framework for Embedded Applications Inproceedings

情報処理学会 組込み技術とネットワーク に関するワーク ショップ (ETNET), 情報処理学会 研究報告, 2011.

BibTeX | Tags: embedded system, enery characterization, integer linear programming, low energy consumption, memory management, operating system, scratch-pad memory

Hideki Takase, Gang Zeng, Lovic Gauthier, Hirotaka Kawashima, Noritoshi Atsumi, Tomohiro Tatematsu, Yoshitake Kobayashi, Shunitsu Kohara, Takenori Koshiro, Tohru Ishihara, others

An integrated optimization framework for reducing the energy consumption of embedded real-time applications Inproceedings

Low Power Electronics and Design (ISLPED) 2011 International Symposium on, pp. 271–276, IEEE 2011.

BibTeX | Tags: compilation, embedded system, enery characterization, integer linear programming, low energy consumption, memory management, multitask, operating system, scratch-pad memory

Lovic Gauthier, Tohru Ishihara

Implementation of stack data placement and run time management using a scratch-pad memory for energy consumption reduction of embedded applications Journal Article

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 94 (12), pp. 2597–2608, 2011.

BibTeX | Tags: compilation, integer linear programming, low energy consumption, memory management, scratch-pad memory

2010

Lovic Gauthier, Tohru Ishihara, Hiroaki Takada

Stack Frames Placement in Scratch-Pad Memory for Energy Reduction of Multi-task Applications Inproceedings

the proceedings of DA Symposium, pp. 171–176, 2010.

BibTeX | Tags: compilation, integer linear programming, low energy consumption, memory management, scratch-pad memory

Lovic Gauthier, Tohru Ishihara, Hideki Takase, Hiroyuki Tomiyama, Hiroaki Takada

Placing static and stack data into a scratch-pad memory for reducing the energy consumption of multi-task applications Inproceedings

Proceedings of the 16th Workshop on Synthesis and System Integration of Mixed Information Technologies (SASIMI'10), pp. 7–12, 2010.

BibTeX | Tags: compilation, integer linear programming, low energy consumption, memory management, scratch-pad memory

Lovic Gauthier, Tohru Ishihara, Hideki Takase, Hiroyuki Tomiyama, Hiroaki Takada

Minimizing inter-task interferences in scratch-pad memory usage for reducing the energy consumption of multi-task systems Inproceedings

Proceedings of the 2010 international conference on Compilers, architectures and synthesis for embedded systems, pp. 157–166, ACM 2010.

BibTeX | Tags: compilation, integer linear programming, low energy consumption, memory management, multitask, scratch-pad memory

Lovic Gauthier, Tohru Ishihara

Compiler assisted energy reduction techniques for embedded multimedia processors Inproceedings

Proceedings of the 2nd APSIPA Annual Summit and Conference, pp. 27–36, 2010.

BibTeX | Tags: compilation, enery characterization, integer linear programming, low energy consumption, memory management, scratch-pad memory

2009

Lovic Gauthier, Tohru Ishihara

Optimal stack frame placement and transfer for energy reduction targeting embedded processors with scratch-pad memories Inproceedings

2009 IEEE/ACM/IFIP 7th Workshop on Embedded Systems for Real-Time Multimedia, pp. 116–125, IEEE 2009.

BibTeX | Tags: compilation, integer linear programming, low energy consumption, memory management, scratch-pad memory

Antoine Trouvé, Lovic Gauthier, Takayuki Kando, Benoît Ryder, Sébastien Pouzols, Pradeep Rao, Norifumi Yoshimatsu, Kazuaki Murakami

Accelerating cryptographic applications using dynamically reconfigurable functional units Inproceedings

2009 International Conference on Reconfigurable Computing and FPGAs, pp. 231–236, IEEE 2009.

BibTeX | Tags: compilation, cryptography, reconfigurable processor

2007

Ahmed Amine Jerraya, Jean Marc Daveau, Gilberto Fernandes Marchioro, Carlos Valderrama, Mohamed Romdhani, Tarek Ben Ismail, Nacer-Eddine Zergainoh, Fabiano Hessel, Pascal Coste, Philippe Le Marrec, Amer Baghdadi, Lovic Gauthier

Hardware/Software Codesign Incollection

Design of Systems on Chip, pp. 133–158, Springer, 2007.

BibTeX | Tags: code generation, codesign, component-based design, embedded system, interface, operating system

2006

Victor M Goulart Ferreira, Lovic Gauthier, Takayuki Kando, Takuma Matsuo, Toshihiko Hashinaga, Kazuaki Murakami

REDEFIS: a system with a redefinable instruction set processor Inproceedings

Proceedings of the 19th annual symposium on Integrated circuits and systems design, pp. 14–19, ACM 2006.

BibTeX | Tags: compilation, reconfigurable processor

2004

Sungjoo Yoo, Aimen Bouchhima, Wander Cesario, Ahmed A. Jerraya, Lovic Gauthier

Low-Power SoC with Power-Aware Operating Systems Generation Journal Article

Low-Power Electronics Design, pp. chapitre–3, 2004.

BibTeX | Tags: low energy consumption, operating system, SoC

Vytautas Štuikys, Damien Lyonnard, Wander O. Cesário, Yannick Paviot, Ahmed A. Jerraya, Lovic Gauthier

Commucation Co-Processor Design by Composition of Parameterized Cells Journal Article

Information Technology And Control, 30 (1), 2004.

BibTeX | Tags: component-based design

Wander Cesário, Lovic Gauthier, Damien Lyonnard, Gabriela Nicolescu, Ahmed Amine Jerraya

Object-based hardware/software component interconnection model for interface design in system-on-a-chip circuits Journal Article

Journal of Systems and Software, 70 (3), pp. 229–244, 2004.

BibTeX | Tags: codesign, component-based design

2003

Lovic Gauthier, Ahmed Amine Jerraya, Yannick Paviot

Conception des logiciels embarqués pour les systemes monopuces Journal Article

Herm`es, Trait'e EGEM, 2003.

BibTeX | Tags: codesign, component-based design, embedded system, operating system, SoC

2002

Ahmed Amine Jerraya, Amer Baghdadi, Wander Cesário, Lovic Gauthier, Damien Lyonnard, Nicolescu, Gabriela, Yanick Paviot, Sungjoo Yoo

Application-specific multiprocessor Systems-on-Chip Journal Article

Microelectronics journal, 33 (11), pp. 891–898, 2002.

BibTeX | Tags:

Wander Cesário, Yannick Paviot, Amer Baghdadi, Lovic Gauthier, Damien Lyonnard, Gabriela Nicolescu, Sungjoo Yoo, Mario Diaz-Nava, Ahmed Amine Jerraya

HW/SW interfaces design of a VDSL modem using automatic refinement of a virtual architecture specification into a multiprocessor SoC: a case study Journal Article

signal, 8 (T6), pp. T7, 2002.

BibTeX | Tags:

Yoo, Sungjoo, Nicolescu, Gabriela, Gauthier, Lovic, Jerraya, Ahmed

Automatic generation of fast timed simulation models for operating systems in SoC design Inproceedings

Proceedings of the conference on Design, automation and test in Europe, pp. 620, IEEE Computer Society 2002.

BibTeX | Tags:

Wander Cesário, Amer Baghdadi, Lovic Gauthier, Damien Lyonnard, Gabriela Nicolescu, Yanick Paviot, Sungjoo Yoo, Ahmed Amine Jerraya, Mario Diaz-Nava

Component-based design approach for multicore SoCs Inproceedings

Proceedings of the 39th annual Design Automation Conference, pp. 789–794, ACM 2002.

BibTeX | Tags:

Lovic Gauthier, Natasha Devroye, Hiroyuki Tomiyama, Kazuaki Murakami

A front-end for better behavioral synthesis Journal Article

電子情報通信学会技術研究報告. CPSY, コンピュータシステム, 102 (478), pp. 31–36, 2002.

BibTeX | Tags: compilation, HDL

Ces'ario, Wander O, Lyonnard, Damien, Nicolescu, Gabriela, Paviot, Yanick, Yoo, Sungjoo, Jerraya, Ahmed A, Gauthier, Lovic, Diaz-Nava, Mario

Multiprocessor SoC platforms: a component-based design approach Journal Article

IEEE Design & Test of Computers, 19 (6), pp. 52–63, 2002.

BibTeX | Tags:

Gabriela Nicolescu, Kjetil Svarstad, Wander Cesário, Lovic Gauthier, Damien Lyonnard, Sungjoo Yoo, Pascal Coste, Ahmed Amine Jerraya

Desiderata for the specification and design of electronic systems Journal Article

Technique-et-Science-Informatiques, 21 , pp. 291–314, 2002.

BibTeX | Tags:

2001

Gauthier, L, Yoo, Sungjoo, Jerraya, AA

Automatic generation and targeting of application specific operating systems and embedded systems software Inproceedings

Design, Automation and Test in Europe, 2001. Conference and Exhibition 2001. Proceedings, pp. 679–685, IEEE 2001.

BibTeX | Tags:

Gauthier, Lovic, Yoo, Sungjoo, Jerraya, Ahmed Amine

Automatic generation and targeting of application-specific operating systems and embedded systems software Journal Article

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 20 (11), pp. 1293–1301, 2001.

BibTeX | Tags:

Ces'ario, Wander O, Nicolescu, Gabriela, Gauthier, Lovic, Lyonnard, Damien, Jerraya, Ahmed Amine

Colif: a multilevel design representation for application-specific multiprocessor system-on-chip design Inproceedings

Rapid System Prototyping, 12th International Workshop on, 2001., pp. 110–115, IEEE 2001.

BibTeX | Tags:

Gauthier, Lovic

G'en'eration de syst`eme d'exploitation pour le ciblage de logiciel multit^ache sur des architectures multiprocesseurs h'et'erog`enes dans le cadre des syst`emes embarqu'es sp'ecifiques. PhD Thesis

Institut National Polytechnique de Grenoble-INPG, 2001.

BibTeX | Tags:

Gauthier, Lovic, Jerraya, Ahmed Amine, Yoo, Sungjoo

Application-specific operating systems generation and targeting for embedded SoCs Inproceedings

The workshop on Synthesis And System Integration of MIxed technologies, 2001. Proceedings, 2001.

BibTeX | Tags:

Yoo, Sungjoo, Nicolescu, Gabriela, Gauthier, Lovic, Jerraya, Ahmed Amine

Fast timed cosimulation of HW/SW implementation of embedded multiprocessor SoC communication Inproceedings

High-Level Design Validation and Test Workshop, 2001. Proceedings. Sixth IEEE International, pp. 79–82, IEEE 2001.

BibTeX | Tags:

Ces'ario, Wander O, Nicolescu, Gabriela, Gauthier, Lovic, Lyonnard, Damien, Jerraya, Ahmed A

Colif: A design representation for application-specific multiprocessor socs Journal Article

IEEE Design & Test, 18 (5), pp. 8–20, 2001.

BibTeX | Tags:

Zergainoh, N, Baghdadi, Amer, Tambour, L, Lyonnard, D, Gauthier, L, Jerraya, AA

Framework for system design, validation and fast prototyping of multiprocessor SoCs Journal Article

Architecture and Design of Distributed Embedded Systems Series: IFIP International Federation for Information Processing,, 2001.

BibTeX | Tags:

2000

Gauthier, Lovic, Jerraya, Ahmed Amine

Cycle-true simulation of the ST10 microcontroller Inproceedings

Design, Automation and Test in Europe Conference and Exhibition 2000. Proceedings, pp. 742, IEEE 2000.

BibTeX | Tags:

Gauthier, Lovic, Jerraya, Ahmed Amine

Cycle-true simulation of the ST10 microcontroller including the core and the peripherals Inproceedings

Rapid System Prototyping, 2000. RSP 2000. Proceedings. 11th International Workshop on, pp. 60–65, IEEE 2000.

BibTeX | Tags: interpretation, microcontroller, peripherals, processor simulator, ST10

Zergainoh, N-E, Baghdadi, A, Tambour, L, Lyonnard, D, Gauthier, L, Jerraya, AA

Framework for system design, validation and fast prototyping of multiprocessor system-on-chip: applied to telecommunication systems Inproceedings

International Workshop on Distributed and Parallel Embedded Systems (DIPES'00), IFIP 2000.

BibTeX | Tags:

Gauthier, L, Jerraya, AA

Software & RTOS targeting for multiprocessor architectures Inproceedings

MEDEA Conference on Embedded System Design, 2000.

BibTeX | Tags:

Cesario, WO, Gauthier, L, Lyonnard, D, Nicolescu, G, Jerraya, AA

An XML-based meta-model for the design of multiprocessor embedded systems Inproceedings

VHDL International Users Forum Fall Workshop, 2000. Proceedings, pp. 75–82, IEEE 2000.

BibTeX | Tags: